1. Field
Implementations of the invention relate to electronic systems, and more particularly, to protection and high voltage isolation of low voltage interface terminals systems for mixed-signal high voltage integrated circuits (ICs).
2. Description of the Related Technology
Certain electronic systems are configured to protect circuits or components therein from transient electrical events. A transient signal event may be in the form of an electrical signal of a relatively short duration having rapidly changing voltage and high power. Transient signal events can include, for example, electrical overstress/electrostatic discharge (EOS/ESD) events arising from the abrupt release of charge from an object or person to an electronic system.
Transient signal events can damage integrated circuits (ICs) inside an electronic system due to overvoltage conditions and/or high levels of power dissipation over relatively small areas of the ICs. Electronic circuit reliability is enhanced by integrating protection devices in an IC such that the protection devices are connected between the different pads or pins of the IC. The protection devices can be incorporated on-chip or at the system-level, and can maintain the voltage level at the pads within a predefined safe range by transitioning from a high impedance/low leakage state to a low impedance/high conductivity state when the voltage of the transient signal reaches a trigger voltage. Thereafter, the protection device can shunt the largest portion of the current associated with the transient signal before the voltage of the transient signal reaches a positive or negative failure voltage that can lead to one of the most common causes of IC damage in the field. After activation, a protection device can remain in the low-impedance state as long as the transient signal voltage level is above a positive holding voltage or below a negative holding voltage.
Complementary Metal Oxide Semiconductors (CMOS), Bipolar CMOS (BiCMOS), or Bipolar Diffused Metal Oxide Semiconductors (BiDMOS) devices may be configured to operate at input/output voltages that are a fraction of the power supply source voltage. ESD protection for these devices may also include additional discrete protection components which provide isolation between the various voltage terminals. As a result, conventional solutions which include separate isolated devices may present limitations due to excessive loading, voltage terminal isolation sensitivity, large area requirements, and added complexity to the circuit design layout and integration.